ADLINK PCI-8102 - Manual (Page 42)

Signal Connections 31
PCI-8102
The output circuit for the SVON signal is shown below:
3.10 General-Purpose Signal RDY
The RDY signals can be used as motor driver ready input or gen-
eral purpose input signals. The signal names, pin numbers, and
axis numbers are shown as follows:
The input circuit of RDY signal is shown in the following diagram:
3.11 Position Compare Output pin: CMP
The PCI-8102 provides 2 comparison output channels, CMP0 and
CMP1, which refer to axes 0 and 1 respectively. The comparison
output channel will generate a pulse signal when the encoder
counter reaches a pre-set value set by the user.
P1 Pin No Signal Name Axis #
11 RDY0 1
45 RDY1 2
P1 Inside 8102
P1
VDD (+5V)
Inside 8102