ADLINK PCI-8102 - Manual (Page 38)

Signal Connections 27
PCI-8102
3.5 End-Limit Signals PEL and MEL
There are two end-limit signals PEL and MEL for each axis. PEL
indicates the end limit signal is in the plus direction and MEL indi-
cates the end limit signal is in the minus direction. The signal
names, pin numbers, and axis numbers are shown in the table
below:
A circuit diagram is shown in the diagram below. The external limit
switch should have a contact capacity of +24V @ 8mA minimum.
Either ‘A-type’ (normal open) contact or ‘B-type’ (normal closed)
contact switches can be used. To set the active logic of the exter-
nal limit signal, please refer to the explanation of
_8102_set_limit_logic function.
P1 Pin No
Signal
Name
Axis
#
P1 Pin No
Signal
Name
Axis
#
20 PEL0 1 21 MEL0 1
54 PEL1 2 55 MEL1 2
Inside 8102 P1