Maxq family user’s guide: maxq8913 supplement – Maxim Integrated MAXQ Family Users Guide: MAXQ8913 Supplement User Manual
Page 37
MAXQ Family User’s Guide:
MAXQ8913 Supplement
6-5
6.1.8 External Interrupt Flag 0 Register (EIF0, M0[02h])
Each bit in this register is set when a negative or positive edge (depending on the ITn bit setting) is detected on the cor-
responding interrupt pin. Once an external interrupt has been detected, the interrupt flag bit remains set until cleared
by software or a reset. Setting any of these bits causes the corresponding interrupt to trigger if it is enabled to do so.
Bit 7: External Interrupt 7 Edge Detect (IE7)
Bit 6: External Interrupt 6 Edge Detect (IE6)
Bit 5: External Interrupt 5 Edge Detect (IE5)
Bit 4: External Interrupt 4 Edge Detect (IE4)
Bit 3: External Interrupt 3 Edge Detect (IE3)
Bit 2: External Interrupt 2 Edge Detect (IE2)
Bit 1: External Interrupt 1 Edge Detect (IE1)
Bit 0: External Interrupt 0 Edge Detect (IE0)
6.1.9 External Interrupt Flag 1 Register (EIF1, M0[04h])
Each bit in this register is set when a negative or positive edge (depending on the ITn bit setting) is detected on the cor-
responding interrupt pin. Once an external interrupt has been detected, the interrupt flag bit remains set until cleared
by software or a reset. Setting any of these bits causes the corresponding interrupt to trigger if it is enabled to do so.
Bits 7:4: Reserved
Bit 3: External Interrupt 11 Edge Detect (IE11)
Bit 2: External Interrupt 10 Edge Detect (IE10)
Bit 1: External Interrupt 9 Edge Detect (IE9)
Bit 0: External Interrupt 8 Edge Detect (IE8)
Bit #
7
6
5
4
3
2
1
0
Name
IE7
IE6
IE5
IE4
IE3
IE2
IE1
IE0
Reset
0
0
0
0
0
0
0
0
Access
rw
rw
rw
rw
rw
rw
rw
rw
Bit #
7
6
5
4
3
2
1
0
Name
—
—
—
—
IE11
IE10
IE9
IE8
Reset
0
0
0
0
0
0
0
0
Access
r
r
r
r
rw
rw
rw
rw
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