Maxim Integrated MAXQ Family Users Guide: MAXQ2000 Supplement - Manual

Functional Diagrams
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
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MAXQ Family User’s Guide:
MAXQ2000 Supplement
TABLE OF CONTENTS
Rev 3; 6/07
ADDENDUM TO SECTION 1: OVERVIEW 7
References 7
ADDENDUM TO SECTION 2: ARCHITECTURE 7
Instruction Set 7
Harvard Memory Architecture 7
Register Space 7
Memory Organization 9
Register Space 9
Program Stack 9
Data SRAM 9
Program Flash 9
Program and Data Memory Mapping 9
Clock Generation 11
External High-Frequency Oscillator Circuit or Clock 12
Internal Ring Oscillator 12
External 32kHz Crystal Oscillator Circuit or Clock 13
Interrupts 13
Reset Conditions 16
Power-On Reset 16
Watchdog Timer Reset 16
External Reset 16
MAXQ2000
132-SEGMENT
LCD CONTROLLER/
DRIVER
RTC
1-WIRE MASTER
TIMER/PWM
16-BIT MAXQ™
RISC CPU
32k x 16 FLASH ROM
(64kBytes)
1k x 16 DATA RAM
(2kBytes)
16 x 16 HARDWARE
MULTIPLY
JTAG DEBUG
SERIAL UART
SPI INTERFACE
17 x 8 DISPLAY
RAM
This document is provided as a supplement to the MAXQ Family User’s Guide, covering new or modified features specific to the MAXQ2000. This document
must be used in conjunction with the MAXQ Family User’s Guide, available from Dallas Semiconductor. Addenda are arranged by section number, which
correspond to sections in the MAXQ Family User’s Guide. Additions and changes, with respect to the MAXQ Family User’s Guide, are contained in this docu-
ment. This document is a work in progress, and updates/additions are added when available.