Maxim Integrated MAXQ Family Users Guide: MAXQ2000 Supplement - Manual (Page 56)

MAXQ Family User’s Guide:
MAXQ2000 Supplement
ADDENDUM TO SECTION 15: TEST ACCESS PORT (TAP)
The JTAG TAP port on the MAXQ2000 is multiplexed with port pins P4.0, P4.1, P4.2, and P4.3. These pins default to their JTAG TAP
function on reset, which means that the part will always be ready for in-circuit debugging or in-circuit programming operations follow-
ing any reset.
Once an application has been loaded and starts running, the JTAG TAP port can still be used for in-circuit debugging operations. If
in-circuit debugging functionality is not needed, the P4.0, P4.1, P4.2, and P4.3 port pins can be reclaimed for application use by set-
ting the TAP (SC.7) bit to 0. This disables the JTAG TAP interface and allows the four pins to operate as normal port pins.
The maximum speed of the JTAG/TAP interface clock (TCK) is limited to the system clock frequency divided by 8.
ADDENDUM TO SECTION 16: IN-CIRCUIT DEBUG MODE
The MAXQ2000 provides an in-circuit debugging interface through a JTAG TAP port as described in the MAXQ Family User’s Guide.
This interface provides the following functions for use in debugging application software.
• Single-step (trace) execution
• Four program address breakpoints
• Two breakpoints configurable as data address or register address breakpoints
• Register read and write
• Program stack read
• Data memory read and write
• Optional password protection
The following sections provide specific notes on the operation of the MAXQ2000 in debugging mode.
Register Read and Write Commands
Any register location can be read or written using these commands, including reserved locations and those used for op code support.
No protection is provided by the debugging interface, and avoiding side effects is the responsibility of the host system communicat-
ing with the MAXQ2000.
Writing to the IP register alters the address that execution resumes at once the debugging engine exits.
In general, reading a register through the debug interface returns the value that was in that register before the debugging engine was
invoked. An exception to this rule is the SP register. Reading the SP register through the debug interface actually returns the value (SP + 1).
Data Memory Read Command
When invoking this command, ICDA should be set to the word address of the starting location to read from, and ICDD should be set
to the number of words. The input address must be based on the utility ROM memory map, as shown in Figure 3. Data memory words
returned by this command are output LSB first.
Data Memory Write Command
When invoking this command, ICDA should be set to the word address of the location to write to, and ICDD should be set to the data
word to write. The input address must be based on the utility ROM memory map, as shown in Figure 3.
Program Stack Read Command
When invoking this command, ICDA should be set to the address of the starting stack location (value of SP) to read from, and ICDD
should be set to the number of words. The address given in ICDA is the highest value that will be used, as words are popped off the
stack and returned in descending order. Stack words returned by this command are output LSB first.
Read Register Map Command
This command outputs all peripheral registers in the range M0[00h] to M4[11h], along with a fixed set of system registers. The follow-
ing formatting rules apply to the returned data.
• System registers are output as 8-bit or 16-bit, least significant byte first.
• All peripheral registers are output as 16-bit, least significant byte first. The top byte of 8-bit registers is returned as 00h.
• Non-implemented peripheral registers in the range M0[00h] to M4[11h] are returned as 0000h.
• The value of SPIB is not read, and this register is returned as 0000h.
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