Maxq family user’s guide: maxq2000 supplement – Maxim Integrated MAXQ Family Users Guide: MAXQ2000 Supplement User Manual
Page 47
Register Name:
PD7
Register Description:
Port 7 Direction Register
Register Address:
M1[13h]
Bits 0 and 1: (PD7.0 and PD7.1) Port Direction Bits for P7.0 and P7.1. Each these bits controls the input/output direction of its cor-
responding port pin as follows.
0 = The port pin is in input mode, either with a weak pullup (if PO = 1) or tri-stated (if PO = 0).
1 = The port pin is in output mode, with the output level to drive given by PO.
Bits 2 to 7: (PD7.2 to PD7.7) Reserved
Register Name:
SVS
Register Description:
Supply Voltage Select Register
Register Address:
M1[10h]
Each bit in this register controls the supply voltage used for a particular port pin’s input and output levels, as follows.
0 = The standard V
DDIO
supply rail will be used to drive this port pin.
1 = The LCD supply rail will be used to drive this port pin.
Bit 0: (SVS.0) Supply Voltage Select for P7.0 (SV70)
Bit 1: (SVS.1) Supply Voltage Select for P7.1 (SV71)
Bits 2, 3, 6, 7: Reserved
Bit 4: (SVS.4) Supply Voltage Select for P6.4 (SV64)
Bit 5: (SVS.5) Supply Voltage Select for P6.5 (SV65)
MAXQ Family User’s Guide:
MAXQ2000 Supplement
Bit #
7
6
5
4
3
2
1
0
Name
—
—
—
—
—
—
PD7.1
PD7.0
Reset
0
0
0
0
0
0
0
0
Access
r
r
r
r/w
r/w
r/w
r/w
r/w
Bit #
7
6
5
4
3
2
1
0
Name
—
—
SV65
SV64
—
—
SV71
SV70
Reset
0
0
0
0
0
0
0
0
Access
r
r
r/w
r/w
r
r
r/w
r/w
Maxim Integrated
47