Maxim Integrated MAXQ Family Users Guide: MAXQ2000 Supplement - Manual (Page 7)

ADDENDUM TO SECTION 1: OVERVIEW
The MAXQ2000 is a low-power, high-performance 16-bit RISC microcontroller based on the MAXQ™ architecture. It includes support
for integrated, in-system-programmable flash memory and a wide range of peripherals including an LCD driver supporting up to x4
multiplexed displays. The MAXQ2000 is ideally suited for battery-powered, portable applications such as blood glucose monitoring,
medical instrumentation, environmental data logging, and industrial control.
References
Refer to the MAXQ Family User’s Guide (www.maxim-ic.com/user guides) for the following information.
• Description of the core architecture, instruction set, and memory mapping common to all MAXQ microcontrollers.
• Definitions and functions of the common system register set, including accumulators, data pointers, loop counters, and general-pur-
pose registers.
• Descriptions of common clock generation, interrupt handling, and reset/power management modes.
• Descriptions and programming examples for common peripherals including Timer/Counter types 0/1/2, serial UART, SPI™ interface,
hardware multiplier, 1-Wire ® bus master, and the real-time clock.
• Description of the Test Access Port (TAP) and in-circuit debug interface.
• Description of the in-system programming mode.
The online MAXQ2000 QuickView page contains information and data sheet links for all parts in the MAXQ2000 family.
For more information on other MAXQ microcontrollers, development hardware and software, frequently asked questions and software
examples, visit the MAXQ home page at www.maxim-ic.com/MAXQ.
For general questions and discussion of the MAXQ platform, visit our discussion board at http://discuss.dalsemi.com.
ADDENDUM TO SECTION 2: ARCHITECTURE
The MAXQ2000 shares the following common architectural features with other members of the MAXQ microcontroller family.
Instruction Set
The MAXQ2000 uses the standard 16-bit MAXQ instruction set as described in the MAXQ Family User’s Guide.
Harvard Memory Architecture
Program memory, data memory, and register space on the MAXQ2000 follow the Harvard architecture model. Each type of memory is
kept separate and is accessed by a separate bus, allowing different word lengths for different types of memory. Registers may be either
8 or 16 bits in width. Program memory is 16 bits in width to accommodate the standard MAXQ 16-bit instruction set. Data memory is
also 16 bits in width but can be accessed in 8-bit or 16-bit modes for maximum flexibility.
The MAXQ2000 includes a flexible memory management unit (MMU), which allows code to be executed from either the program
flash/ROM, the utility ROM, or the internal data SRAM. Any of these three memory spaces may also be accessed in data space at any
time, with the single restriction that whichever physical memory area is currently being used as program space cannot be read from
in data space.
Register Space
The MAXQ2000 contains the standard set of system registers as described in the MAXQ Family User’s Guide; differences are noted in
this guide where they exist. Peripheral register space (modules 0 through 4) on the MAXQ2000 contains registers that are used to
access the following peripherals:
• General-purpose 8-bit I/O ports (P0 through P7)
• External interrupts (up to 14)
• Three programmable Type 2 timer/counters
• Serial UART interfaces (2) and SPI
• Hardware Multiplier
• Real-Time Clock
MAXQ Family User’s Guide:
MAXQ2000 Supplement
MAXQ is a trademark of Maxim Integrated Products, Inc.
SPI is a trademark of Motorola, Inc.
1-Wire is a registered trademark of Dallas Semiconductor Corp.
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