Maxim Integrated MAXQ Family Users Guide: MAXQ2000 Supplement - Manual (Page 53)

ADDENDUM TO SECTION 12: HARDWARE MULTIPLIER
The MAXQ2000 provides a hardware multiplier module that provides the following features (detailed in the MAXQ Family User’s Guide).
• Completes a 16-bit x 16-bit multiply-accumulate or multiply-subtract operation in a single cycle
• Includes 48-bit accumulator
• Supports seven different multiplication operations:
Unsigned 16-bit multiply
Unsigned 16-bit multiply and accumulate
Unsigned 16-bit multiply and subtract
Signed 16-bit multiply
Signed 16-bit multiply and negate
Signed 16-bit multiply and accumulate
Signed 16-bit multiply and subtract
The associated registers for this module are listed below.
Multiplier Example: 16-Bit Unsigned Multiplication
move MCNT, #021h ; 0010 0001
; 0 - OF : overflow flag (read only)
; 0 - MCW : write result to MC registers
; 1 - CLD : clears MA/MB/MCx to zero
; 0 - SQU : square function disabled
; 0 - OPCS : start op after writing MA,MB
; 00 - MCNT : MC = MA * MB
; 1 – SUS : unsigned operation
move MA, #01234h ; load first operand
move MB, #00055h ; load second operand, operation starts
move A[2], MC2 ; should be 0000h
move A[1], MC1 ; should be 0006h
move A[0], MC0 ; should be 0B44h
MAXQ Family User’s Guide:
MAXQ2000 Supplement
REGISTER ADDRESS FUNCTION
MCNT M2[00h] Multiplier Control Register. Controls operation and mode selection for the multiplier.
MA M2[01h] Multiplier Operand A Register. Input register for multiplier operations.
MB M2[02h] Multiplier Operand B Register. Input register for multiplier operations.
MC2 M2[03h] Multiplier Accumulate Register 2. Contains bits 32 to 47 of the accumulator.
MC1 M2[04h] Multiplier Accumulate Register 1. Contains bits 16 to 31 of the accumulator.
MC0 M2[05h] Multiplier Accumulate Register 0. Contains bits 0 to 15 of the accumulator.
MC1R M2[0Bh] Multiplier Read Register 1. Contains bits 16 to 31 of the last multiplier operation result.
MC0R M2[0Ch] Multiplier Read Register 2. Contains bits 0 to 15 of the last multiplier operation result.
Table 19. Hardware Multiplier Control Registers
Maxim Integrated 53