Maxim Integrated MAXQ Family Users Guide: MAXQ2000 Supplement - Manual (Page 48)

MAXQ Family User’s Guide:
MAXQ2000 Supplement
Register Name: WKO
Register Description: Wakeup Output Register
Register Address: M1[1Fh]
Bit 0: (WKO.0) Wakeup Output 0 Enable (WKE0). When set to 1, this bit enables the output of a wakeup signal on port pin P6.4. The
active polarity of the output signal is determined by the WKL bit, on the output pulse duration is determined by the duration of the
source that triggers the wakeup event.
Bit 1: (WKO.1) Wakeup Output 1 Enable (WKE1). When set to 1, this bit enables the output of a wakeup signal on port pin P6.5. The
active polarity of the output signal is determined by the WKL bit, on the output pulse duration is determined by the duration of the
source that triggers the wakeup event.
Bit 2: (WKO.2) Wakeup Output Level (WKL). This bit determines the polarity of the wakeup signal, which may be output on P6.4 and
P6.5 as follows.
0 = Wakeup outputs are driven low when a wakeup source is active.
1 = Wakeup outputs are driven high when a wakeup source is active.
When no wakeup source is active, the enabled wakeup outputs will be driven to the opposite level (low if WKL = 1, high if WKL = 0).
Bits 3 to 7: (WKO.3 to WKO.7) Reserved
Port Pin Example 1: Driving Outputs on Port 0
move PO0, #000h ; Set all outputs low
move PD0, #0FFh ; Set all P0 pins to output mode
Port Pin Example 2: Receiving Inputs on Port 1
move PO1, #0FFh ; Set weak pullups ON on all pins
move PD1, #000h ; Set all P1 pins to input mode
nop ; Wait for external source to drive P1 pins
move Acc, PI1 ; Get input values from P1 (will return FF if
; no other source drives the pins low)
Bit # 7 6 5 4 3 2 1 0
Name — — — — — WKL WKE1 WKE0
Reset 0 0 0 0 0 0 0 0
Access r r r r r r/w r/w r/w
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