Clear-Com i-Series Panels - Manual (Page 90)

Clear-Com Communication Systems
I-Series Instruction Manual
7 - 6
PANEL BLOCK DIAGRAM
Figure 7-2: Panel Block Diagram
5 5
4 4
3 3
2 2
1 1
D
D
C
C
B
B
A
A
N/C
LEFT H/S
MCBSP-1
FPGA
CODEC-1
INTERNAL SPEAKER
DSP
HOT
MIC
OUT
TO MA
TRIX-D8
DIGI
T
A
L I
/O
BALANCED PROGRAM INPUT
COM MODULE SLOT
LISTEN
EQ
SPI MODUL
E INTERFACE + DAISY CHAIN
SYNC-3
H/S MIC
DNI
C 2-WI
RE
INTERFACE
TA
L
K
CODEC-2
PLA
RIGHT H/S
RS-422
FPGA
PA
AUDIO OPTION MODULE
LEFT H/S
RS-422 COM MODULE
EXPANSION PORT INTERFACE
AUX MIC
MICRO- PROCESSOR
75uS PRE-EMPH
CODEC SYNC PULSE X 4
LINE LEVEL OUT
SYNC
-2
FIBER/OTHER
RS-422
FUTUR
E DIGIT
A
L INTERFACE
MCBSP-0
F
UTU
R
E
O
P
TI
O
N
A
L
F
IBE
R
/O
THE
R
INTERFACE
AUX CONTROL
RAM
RIGHT H/S
CODEC-3
BOOM MIC
TO MA
TRIX-A8
75uS DE-EMPH
SYNC
-1
INTERCOM
NON-DI
SPLAY
KEY MODUL
E
D
ISPLAY KEY
MODULE
PROGRAM
LEVEL
MODULE
KEY
PAD
MODULE
AUXILIARY OPTION MODULE
SPEAKER FEED OUT
PA
N/C