Rainbow Electronics AT89C51SND1C - Manual (Page 23)

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AT8xC51SND1C
4109E–8051–06/03
Data Memory
The AT8xC51SND1C provides data memory access in 2 different spaces:
1. The internal space mapped in three separate segments:
– The lower 128 Bytes RAM segment
– The upper 128 Bytes RAM segment
– The expanded 2048 Bytes RAM segment
2. The external space.
A fourth internal segment is available but dedicated to Special Function Registers,
SFRs, (addresses 80h to FFh) accessible by direct addressing mode. For information
on this segment, refer to the Section “Special Function Registers”, page 30.
Figure 15 shows the internal and external data memory spaces organization.
Figure 15. Internal and External Data Memory Organization
Internal Space
Lower 128 Bytes RAM The lower 128 Bytes of RAM (see Figure 16) are accessible from address 00h to 7Fh
using direct or indirect addressing modes. The lowest 32 Bytes are grouped into 4
banks of 8 registers (R0 to R7). 2 bits RS0 and RS1 in PSW register (see Table 28)
select which bank is in use according to Table 25. This allows more efficient use of code
space, since register instructions are shorter than instructions that use direct address-
ing, and can be used for context switching in interrupt service routines.
Table 25. Register Bank Selection
The next 16 Bytes above the register banks form a block of bit-addressable memory
space. The C51 instruction set includes a wide selection of single-bit instructions, and
the 128 bits in this area can be directly addressed by these instructions. The bit
addresses in this area are 00h to 7Fh.
2K Bytes
Upper
128 Bytes
Internal RAM
Lower
128 Bytes
Internal RAM
Special
Function
Registers
80h 80h
00h
7FFh FFh
00h
FFh
64K Bytes
External XRAM
0000h
FFFFh
Direct Addressing
Addressing
0800h
7Fh
Internal ERAM
Direct or Indirect
Indirect Addressing
EXTRAM = 0
EXTRAM = 1
RS1 RS0 Description
0 0 Register bank 0 from 00h to 07h
0 1 Register bank 1 from 08h to 0Fh
1 0 Register bank 2 from 10h to 17h
1 1 Register bank 3 from 18h to 1Fh