Texas Instruments TMS320C64x DSP User Manual
Page 56
Video Port Control Registers
2-23
Video Port
SPRU629
Table 2–8. Video Port Interrupt Enable Register (VPIE) Field Descriptions (Continued)
Bit
Description
Value
symval
†
field
†
10
STC
System time clock interrupt enable bit.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
9–8
Reserved
–
0
Reserved. The reserved bit location is always read as 0. A value
written to this field has no effect.
7
LFDA
Long field detected on channel A interrupt enable bit.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
6
SFDA
Short field detected on channel A interrupt enable bit.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
5
VINTA2
Channel A field 2 vertical interrupt enable bit.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
4
VINTA1
Channel A field 1 vertical interrupt enable bit.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
3
SERRA
Channel A synchronization error interrupt enable bit.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
2
CCMPA
Capture complete on channel A interrupt enable bit.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
1
COVRA
Capture overrun on channel A interrupt enable bit.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
0
VIE
Video port global interrupt enable bit. Must be set for interrupt to be
sent to DSP.
DISABLE
0
Interrupt is disabled.
ENABLE
1
Interrupt is enabled.
† For CSL implementation, use the notation VP_VPIE_field_symval