Texas Instruments TMS320C64x DSP - Manual (Page 133)

Video Capture Registers
3-71 Video Capture Port SPRU629
Table 3–23. Video Capture Channel B Control Register (VCBCTL)
Field Descriptions (Continued)
Description
Bit TSI Mode Raw Data Mode BT.656 or Y/C Mode Value symval † field †
10 RESMPL Chroma resampling enable bit.
DISABLE 0 Chroma resampling is
disabled. Not used. Not used.
ENABLE 1 Chroma is horizontally
resampled from
4:2:2 co-sited to
4:2:0 interspersed
before saving to
chroma buffers. Not used. Not used.
9 Reserved – 0 Reserved. The reserved bit location is always read as 0. A value
written to this field has no effect.
8 SCALE Scaling select bit.
NONE 0 No scaling Not used. Not used.
HALF 1 ½ scaling Not used. Not used.
7 CON ‡ Continuous capture enable bit.
DISABLE 0 Continuous capture is disabled.
ENABLE 1 Continuous capture is enabled.
6 FRAME ‡ Capture frame (data) bit.
NONE 0 Do not capture frame. Do not capture
single data block.
Do not capture
single packet.
FRMCAP 1 Capture frame. Capture single
data block. Capture single
packet.
5 CF2 ‡ Capture field 2 bit.
NONE 0 Do not capture field 2. Not used. Not used.
FLDCAP 1 Capture field 2. Not used. Not used.
† For CSL implementation, use the notation VP_VCBCTL_field_symval
‡ For complete encoding of these bits, see Table 3–6, Table 3–11, and Table 3–12.