Texas Instruments TMS320C64x DSP - Manual (Page 281)

Example 1: Noncontinuous Frame Capture for 525/60 Format
A-5 Video Port Configuration Examples SPRU629
/* Set last pixel to be captured in Field2 (VCA_STOP2 reg) */
VP_RSETH(vpCaptureHandle, VCASTOP2,
VP_VCASTOP2_RMK(VCA_YSTOP2, VCA_XSTOP2));
/* Set first pixel to be captured in Field1 (VCA_STRT1 reg) */
VP_RSETH(vpCaptureHandle, VCASTRT1, VP_VCASTRT1_RMK(VCA_YSTART1,
VP_VCASTRT1_SSE_ENABLE, VCA_XSTART1));
/* Set first pixel to be captured in Field2 (VCA_STRT2 reg) */
VP_RSETH(vpCaptureHandle, VCASTRT2,
VP_VCASTRT2_RMK(VCA_YSTART2, VCA_XSTART2));
/* Set threshold values */
VP_RSETH(vpCaptureHandle, VCATHRLD,
VP_VCATHRLD_RMK(VCA_THRLD_FIELD2, VCA_THRLD_FIELD1));
/* Set capture event–register values */
VP_RSETH(vpCaptureHandle, VCAEVTCT,
VP_VCAEVTCT_RMK(VCA_CAPEVT2,VCA_CAPEVT1));
/* Vertical interrupts (VCA_INT) are not enabled in this */
/* in this example. */
/* Set CMODE to 8–bit BT.656 */
VP_FSETH(vpCaptureHandle, VCACTL, CMODE, VP_VCACTL_CMODE_BT656B);
/* Set non–continuous frame capture */
VP_FSETH(vpCaptureHandle, VCACTL, CON, VP_VCACTL_CON_DISABLE);
VP_FSETH(vpCaptureHandle, VCACTL, FRAME, VP_VCACTL_FRAME_FRMCAP);
VP_FSETH(vpCaptureHandle, VCACTL, CF2, VP_VCACTL_CF2_NONE);
VP_FSETH(vpCaptureHandle, VCACTL, CF1, VP_VCACTL_CF1_NONE);
/* Let FDD and FINV to be their defaults */
/* Set VRST to end of vertical blanking */
VP_FSETH(vpCaptureHandle, VCACTL, VRST, VP_VCACTL_VRST_V0EAV);
/* Set HRST to start of horizontal blanking */
VP_FSETH(vpCaptureHandle, VCACTL, HRST, VP_VCACTL_HRST_OF(0));
/* 10–bit pack mode(10BPK bit) in this 8–bit example */
/* No (1/2) scaling and no chroma re–sampling in this example */
/* Enable video port interrupts */
IRQ_enable(vpCaptureHandle–>eventId);
/* Setup Y, Cb and Cr EDMA channels */
setupVPCapChaAEDMA(portNumber);
/* Clear VPHLT in VP_CTL to make video port function */
VP_FSETH(vpCaptureHandle, VPCTL, VPHLT, VP_VPCTL_VPHLT_CLEAR);