Texas Instruments TMS320C64x DSP - Manual (Page 47)

Video Port Throughput and Latency
Video Port 2-14 SPRU629
Table 2–2. Y/C Video Capture FIFO Capacity
Sample 8-Bit 10-Bit Dense 10-Bit
Y Samples 2560 1920 1280
Cb Samples 1280 960 640
Cr Samples 1280 960 640
Using these values and the formula above, the maximum time to empty the
FIFO (t
O
) may be calculated for each case. The DMA output rate (r
O
) is then
calculated as the FIFO size divided by t
O
:
8-bit (n = 1): t
O
< t
F
+ n(t
H
)
t
O
< 2560/74.25 MHz + 1(3.77
µ
s)
t
O
< 38.3
µ
s
r
O
= t
O
/5120 = 7.4 ns (134 MBytes/s)
10-bit dense (n = 1): t
O
< t
F
+ n(t
H
)
t
O
< 1920/74.25 MHz + 1(3.77
µ
s)
t
O
< 29.63
µ
s
r
O
= t
O
/5120 = 5.79 ns (173 MBytes/s)
10-bit (n = 0): t
O
< t
F
+ n(t
H
)
t
O
< 1280/74.25 MHz
t
O
< 17.24
µ
s
r
O
= t
O
/5120 = 3.37 ns (297 MBytes/s)
A DMA read throughput of at least 300 MBytes/s is required for the highest
capture rate operation supported by 20-bit implementations of the video port.
C64x devices including the video port typically have more than enough DMA
bandwidth to support the highest throughput required by a single video port.
However when using multiple high-bandwidth peripherals together, it is impor-
tant to consider the total DMA throughput required by the peripherals being
used concurrently.