Texas Instruments TMS320C64x DSP - Manual (Page 269)

Overview
VCXO Interpolated Control Port 6-2 SPRU629
6.1 Overview
The VCXO interpolated control (VIC) port provides single-bit interpolated
VCXO control with resolution from 9 bits to up to 16 bits. The frequency of inter-
polation is dependent on the resolution needed.
When the video port is used in transport stream interface (TSI) mode, the VIC
port is used to control the system clock, VCXO, for MPEG transport stream
(Figure 6–1).
The VIC port supports following features:
- Single-bit interpolated VCXO control
- Programmable precision from 9 to 16 bits
Figure 6–1. TSI System Block Diagram
22 K
Ω
100 pF
5V DC
2.2 K
Ω
0.1
µ
F
VCXO
27 MHz
VCTL
VIC
STCLK
VDATA[7–0] (TSI data in)
VCLK1 (TSI clock)
VCTL1 (CAPENA)
VCTL2 (PACSTRT)
VCTL3 (PACERR)
Satellite/
cable
decoder
with
FEC
Video
port A
DSP