Texas Instruments TMS320C64x DSP - Manual (Page 265)

GPIO Registers
General Purpose I/O Operation 5-24 SPRU629
Table 5–12. Video Port Pin Interrupt Status Register (PISTAT) Field Descriptions
Bit field † symval † Value Description
31–23 Reserved – 0 Reserved. The reserved bit location is always read as 0. A
value written to this field has no effect.
22 PISTAT22 PISTAT22 bit indicates if there is a pending interrupt on the
VCTL3 pin.
NONE 0 No pending interrupt on the VCTL3 pin.
VCTL3INT 1 Pending interrupt on the VCTL3 pin.
21 PISTAT21 PISTAT21 bit indicates if there is a pending interrupt on the
VCTL2 pin.
NONE 0 No pending interrupt on the VCTL2 pin.
VCTL2INT 1 Pending interrupt on the VCTL2 pin.
20 PISTAT20 PISTAT20 bit indicates if there is a pending interrupt on the
VCTL1 pin.
NONE 0 No pending interrupt on the VCTL1 pin.
VCTL1INT 1 Pending interrupt on the VCTL1 pin.
19–0 PISTAT[19–0] PISTAT[19–0] bit indicates if there is a pending interrupt on
the corresponding VDATA[n] pin.
NONE 0 No pending interrupt on the VDATA[n] pin.
VDATAnINT 1 Pending interrupt on the VDATA[n] pin.
† For CSL implementation, use the notation VP_PISTAT_PISTATn_symval