Switch engine diffserv table read data register, Swe_diffserv_tbl_rd_data), Section 14.5.3.14 – SMSC LAN9311i User Manual
Page 383: Switch, Datasheet
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
383
Revision 1.4 (08-19-08)
DATASHEET
14.5.3.14
Switch Engine DIFFSERV Table Read Data Register (SWE_DIFFSERV_TBL_RD_DATA)
This register is used to read the DIFFSERV table.
Register #:
1813h
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31:3
RESERVED
RO
-
2:0
DIFFSERV Priority
These bits specify the assigned receive priority for IP packets with a ToS/CS
field that matches this index.
RO
000b
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