SMSC LAN9311i - Manual (Page 151)

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i 151 Revision 1.4 (08-19-08)
DATASHEET
Figure 10.14 EEPROM Loader Flow Diagram
Byte 0 = A5h N
DIGITAL_RST, nRST,
POR, RELOAD
N
Y
EPC_BUSY = 1
Read Byte 0
Read Bytes 1-6
Write Bytes 1-6 into Host
MAC and switch MAC
Address Registers
Read Byte 7-11
Byte 7 = A5h
Y
Write Bytes 8-11 into
Configuration Strap
registers
Update PHY registers
Update VPHY registers
Update LED_CFG,
MANUAL_FC_1,
MANUAL_FC_2 and
MANUAL_FC_mii
registers
Read Byte 12
Byte 12 = A5h
Perform register data
load loop
Soft Reset
Byte 0 = A5h
Read Bytes 1-6
Write Bytes 1-6 into Host
MAC Address Registers
Y
Y
EPC_BUSY = 1
Read Byte 0
Y
Load PHY registers with
current straps
Load PHY registers with
current straps
N
N
N
EPC_BUSY = 0