SMSC LAN9512 User Manual
Datasheet, Product features
SMSC LAN9512
Revision 1.0 (04-20-09)
DATASHEET
Datasheet
PRODUCT FEATURES
LAN9512
USB Hub with Integrated
10/100 Ethernet Controller
Highlights
Two downstream ports, one upstream port
— Two integrated downstream USB 2.0 PHYs
— One integrated upstream USB 2.0 PHY
Integrated 10/100 Ethernet MAC with full-duplex
support
Integrated 10/100 Ethernet PHY with HP Auto-MDIX
Implements Reduced Power Operating Modes
Minimized BOM Cost
— Single 25 MHz crystal (Eliminates cost of separate
crystals for USB and Ethernet)
— Built-in Power-On-Reset (POR) circuit (Eliminates
requirement for external passive or active reset)
Target Applications
Desktop PCs
Notebook PCs
Printers
Game Consoles
Embedded Systems
Docking Stations
Key Benefits
USB Hub
— Fully compliant with Universal Serial Bus Specification
Revision 2.0
— HS (480 Mbps), FS (12 Mbps), and LS (1.5 Mbps)
compatible
— Two downstream ports, one upstream port
— Port mapping and disable support
— Port Swap: Programmable USB diff-pair pin location
— PHY Boost: Programmable USB signal drive strength
— Select presence of a permanently hardwired USB
peripheral device on a port by port basis
— Advanced power saving features
— Downstream PHY goes into low power mode when port
power to the port is disabled
— Full Power Management with individual or ganged
power control of each downstream port.
— Integrated USB termination Pull-up/Pull-down resistors
— Internal short circuit protection of USB differential signal
pins
High-Performance 10/100 Ethernet Controller
— Fully compliant with IEEE802.3/802.3u
— Integrated Ethernet MAC and PHY
— 10BASE-T and 100BASE-TX support
— Full- and half-duplex support with flow control
— Preamble generation and removal
— Automatic 32-bit CRC generation and checking
— Automatic payload padding and pad removal
— Loop-back modes
— TCP/UDP checksum offload support
— Flexible address filtering modes
– One 48-bit perfect address
– 64 hash-filtered multicast addresses
– Pass all multicast
– Promiscuous mode
– Inverse filtering
– Pass all incoming with status report
— Wakeup packet support
— Integrated Ethernet PHY
– Auto-negotiation
– Automatic polarity detection and correction
– HP Auto-MDIX
– Energy Detect
Power and I/Os
— Three PHY LEDs
— Eight GPIOs
— Supports bus-powered and self-powered operation
— Internal 1.8v core supply regulator
— External 3.3v I/O supply
Miscellaneous features
— Optional EEPROM
— Optional 24MHz reference clock output for partner hub
— IEEE 1149.1 (JTAG) Boundary Scan
Software
— Windows 2000/XP/Vista Driver
— Linux Driver
— Win CE Driver
— MAC OS Driver
— EEPROM Utility
Packaging
— 64-pin QFN, lead-free RoHS compliant
Environmental
— Commercial Temperature Range (0°C to +70°C)
— ±8kV HBM without External Protection Devices
— ±8kV contact mode (IEC61000-4-2)
— ±15kV air-gap discharge mode (IEC61000-4-2)
Document Outline
- Chapter 1 Introduction
- Chapter 2 Pin Description and Configuration
- Figure 2.1 LAN9512 64-QFN Pin Assignments (TOP VIEW)
- Table 2.1 EEPROM Pins
- Table 2.2 JTAG Pins
- Table 2.3 Miscellaneous Pins
- Table 2.4 USB Pins
- Table 2.5 Ethernet PHY Pins
- Table 2.6 I/O Power Pins, Core Power Pins, and Ground Pad
- Table 2.7 No-Connect Pins
- Table 2.8 64-QFN Package Pin Assignments
- 2.1 Port Power Control
- 2.2 Buffer Types
- Chapter 3 EEPROM Controller (EPC)
- 3.1 EEPROM Format
- Table 3.1 EEPROM Format
- Table 3.2 Configuration Flags Description
- 3.1.1 Hub Configuration
- Table 3.3 Hub Configuration
- Table 3.4 Config Data Byte 1 Register (CFG1) Format
- Table 3.5 Config Data Byte 2 Register (CFG2) Format
- Table 3.6 Config Data Byte 3 Register (CFG3) Format
- Table 3.7 Boost_Up Register (BOOSTUP) Format
- Table 3.8 Boost_3:2 Register (BOOST32) Format
- Table 3.9 Status/Command Register (STCD) Format
- 3.2 EEPROM Defaults
- 3.3 EEPROM Auto-Load
- 3.4 An Example of EEPROM Format Interpretation
- 3.1 EEPROM Format
- Chapter 4 Operational Characteristics
- Chapter 5 Package Outline