Port x 1588 clock low-dword receive capture, Register (1588_clock_lo_rx_capture_x), Section 14.2.5.2 – SMSC LAN9311i User Manual
Page 203: Datasheet
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
203
Revision 1.4 (08-19-08)
DATASHEET
14.2.5.2
Port x 1588 Clock Low-DWORD Receive Capture Register (1588_CLOCK_LO_RX_CAPTURE_x)
Note:
The selection between Sync or Delay_Req packets is based on the corresponding
master/slave bit in the
1588 Configuration Register (1588_CONFIG)
Note:
There are multiple instantiations of this register, one for each port of the LAN9311/LAN9311i.
Refer to
for additional information.
Note:
For Port 0(Host MAC), receive is defined as data from the switch fabric, while transmit is to
the switch fabric.
Offset:
Port 1: 104h
Size:
32 bits
Port 2: 124h
Port 0: 144h
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
Timestamp Low (TS_LO)
This field contains the low 32-bits of the timestamp taken on the receipt of
a 1588 Sync or Delay_Req packet.
RO
00000000h