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4 stopping and starting the receiver, 5 receiver errors, Stopping and starting the receiver – SMSC LAN9311i User Manual

Page 137: Receiver errors, Section 9.9.4, "stopping and starting the, Receiver, Datasheet 9.9.4 stopping and starting the receiver

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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface

Datasheet

SMSC LAN9311/LAN9311i

137

Revision 1.4 (08-19-08)

DATASHEET

9.9.4

Stopping and Starting the Receiver

To stop the receiver, the host must clear the RXEN bit in the

Host MAC Control Register (HMAC_CR)

.

When the receiver is halted, the RXSTOP_INT will be pulsed and reflected in the

Interrupt Status

Register (INT_STS)

. Once stopped, the host can optionally clear the RX Status and RX Data FIFOs.

The host must re-enable the receiver by setting the RXEN bit.

9.9.5

Receiver Errors

If the Receiver Error (RXE) flag is asserted in the

Interrupt Status Register (INT_STS)

for any reason,

the receiver will continue operation. RX Error (RXE) will be asserted under the following conditions:

„

A host underrun of RX Data FIFO

„

A host underrun of the RX Status FIFO

„

An overrun of the RX Status FIFO

It is the duty of the host to identify and resolve any error conditions.

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