BECKHOFF ET1100 - Manual (Page 57)

MII Interface
Slave Controller – ET1100 Hardware Description III-43
4 MII Interface
The ET1100 is connected with Ethernet PHYs using the MII interfaces. The MII interfaces of the
ET1100 are optimized for low processing/forwarding delays by omitting a transmit FIFO. To allow this,
the ET1100 has additional requirements to Ethernet PHYs, which are easily accomplished by several
PHY vendors.
Refer to “Section I – Technology” for Ethernet PHY requirements.
Additional information regarding the ET1100:

The clock source of the PHYs is either CLK25OUT1/2 of the ET1100, or the clock signal that is
connected to OSC_IN if a quartz oscillator is used.

The TX_CLK signal of the PHYs is not connected to the ET1100. The ET1100 does not use the
MII interface for link detection or link configuration.
For details about the ESC MII Interface refer to Section I.
4.1 MII Interface Signals
The MII interface of the ET1100 has the following signals:
EtherCAT
device
RX_CLK
LINK_MII
RX_DV
RX_ERR
RX_D[3:0]
TX_ENA
MI_CLK
TX_D[3:0]
MI_DATA
PHYAD_OFF
LINKPOL
Figure 5: MII Interface signals