Artesyn MVME51005E SBC Installation and Use (July 2014) - Manual (Page 54)

PPCBug Firmware
MVME51005E Single Board Computer Installation and Use (6806800A38D) 56
A line feed can be inserted after each code is displayed to prevent it from being overwritten by
the next code. This is also enabled by an ENV parameter:
The list of LED/serial codes is included in the section on MPU, Hardware, and Firmware
Initialization found in Chapter 1 of the PPCBug Firmware Package User’s Manual, listed in
Appendix D, Related Documentation .
3.4.4 Configuring the VMEbus Interface
ENV asks the following series of questions to set up the VMEbus interface for the MVME5100.
To perform this configuration, you should have a working knowledge of the Universe ASIC as
described in your MVME5100 Programmer’s Reference Guide. Also, refer to the Tundra
Universe II Users Manual, as listed in
Appendix D, Related Documentation for a detailed
description of VMEbus addressing. In general, the PCI slave images describe the VME master
addresses, while the VMEbus slave describes the VME slave addresses.
VME3PCI Master Master Enable [Y/N] = Y?
PCI Slave Image 0 Control = 00000000?
The configured value is written into the LSI0_CTL register of the Universe chip.
PCI Slave Image 0 Base Address Register = 00000000?
The configured value is written into the LSI0_BS register of the Universe chip.
PCI Slave Image 0 Bound Address Register = 00000000?
The configured value is written into the LSI0_BD register of the Universe chip.
PCI Slave Image 0 Translation Offset = 00000000?
The configured value is written into the LSI0_TO register of the Universe chip.
PCI Slave Image 1 Control = C0820000?
The configured value is written into the LSI1_CTL register of the Universe chip.
Y Set up and enable the VMEbus Interface. (Default)
N Do not set up or enable the VMEbus Interface.