Artesyn MVME51005E SBC Installation and Use (July 2014) - Manual (Page 119)

Programming the MVME5100
MVME51005E Single Board Computer Installation and Use (6806800A38D) 121
7.2.1.3 PCI Memory Map
Following a reset, the Hawk ASIC disables all PCI slave map decoders. The MVME5100 is fully
capable of supporting both PREP and CHRP PCI Memory Maps with RAM size limited to 2GB.
7.2.1.4 VME Memory Map
The MVME5100 is fully capable of supporting both the PREP and the CHRP VME Memory Maps
examples with RAM size limited to 2GB.
7.2.2 PCI Local Bus Memory Map
The PCI memory map is controlled by the MPU/PCI bus bridge controller portion of the Hawk
ASIC and by the Universe PCI/VME bus bridge ASIC. The Hawk and Universe devices adjust
system mapping to suit a given application via programmable map decoder registers.
No default PCI memory map exists. Resetting the system turns the PCI map decoders off, and
they must be reprogrammed in software for the intended application.
For detailed PCI memory maps, including suggested CHRP- and PREP-compatible memory
maps, refer to the MVME5100-Series Single Board Computer Programmer’s Reference Guide.
7.2.3 VMEbus Memory Map
The VMEbus is programmable. Like other parts of the MVME5100 memory map, the mapping
of local resources as viewed by VMEbus masters varies among applications.
The Universe PCI/VME bus bridge ASIC includes a user-programmable map decoder for the
VMEbus-to-local-bus interface. The address translation capabilities of the Universe enable the
processor to access any range of addresses on the VMEbus.
Recommendations for VMEbus mapping, including suggested CHRP- and PREP-compatible
memory maps, can be found in the MVME5100-Series Single Board Computer Programmer’s
Reference Guide.
Figure 7-1 shows the overall mapping approach from the standpoint of a
VMEbus master.