Artesyn MVME51005E SBC Installation and Use (July 2014) - Manual (Page 124)

Programming the MVME5100
MVME51005E Single Board Computer Installation and Use (6806800A38D) 126
The MVME5100 routes the interrupts from the PMCs and PCI expansion slots as follows:
7.3.3 DMA Channels
The PIB supports seven DMA channels. They are not functional on the MVME5100.
7.3.4 Sources of Reset
The MVME5100 has nine potential sources of reset:
1. Power-on reset
2. RST switch (resets the VMEbus when the MVME5100 is system controller)
3. Watchdog timer Reset function controlled by the SGS-Thomson MK48T559 timekeeper
device (resets the VMEbus when the MVME5100 is system controller)
4. ALT_RST* function controlled by the Port 92 register in the PIB (resets the VMEbus when
the MVME5100 is system controller)
5. PCI/ISA I/O Reset function controlled by the Clock Divisor register in the PIB
6. The VMEbus SYSRESET* signal
7. VMEbus Reset sources from the Universe ASIC (PCI/VME bus bridge controller): the System
Software reset, Local Software Reset and VME CSR Reset functions.