Artesyn ATCA-F125 Installation and Use Guide (April 2014) - Manual (Page 67)

Functional Description
ATCA-F125 (6873M Artwork) Installation and Use (6806800J94J) 67
4.3 Memory
The P2020 QorIQ Integrated Processor provides an on-chip DDR3 compliant memory
controller with the following features:
 Programmable timing supporting DDR3 SDRAM
 64-bit data interface
 Full ECC support
 Sleep mode support for self-refresh SDRAM
 On-die termination support when using DDR3
 Supports auto refreshing
 Registered DIMM support
 +1.5V DDR3 compatible interface
4.3.1 Memory Interface
The memory bus is 64-bit wide with ECC protection. It connects the P2020 QorIQ Integrated
Processor directly to the DIMM memory sockets. The memory data bus runs at a maximum
frequency of 400 MHz providing a total bandwidth of 6.4 Gbyte/s.
4.3.2 Memory Sockets
Two 240-pin DDR3 DIMM sockets are provided on the ATCA-F125 to host up to 2 Gbyte of
memory on each DIMM socket using single or dual rank DDR3 registered DIMM memory
modules.
4.3.3 Memory Modules
The ATCA-7470 requires very low profile VLP DDR3 DIMM modules in order to fit within the
maximum component height profile of an ATCA blade. The ATCA-F125 board has been tested
and qualified to operate with a 2GB DDR3 VLP RDIMM from Smart Modular. The operating
system is currently limited to 2GB of DDR3 memory