Echelon LonWorks Router - Manual (Page 93)

Example Neuron C Source
This section shows an example Neuron C file for Series 5000 router development.
This file primarily controls the router’s buffering, but it also contains important
declarations to set up the parallel IO configuration and explicit addressing.
//
// Copyright (c) 2011 Echelon Corporation.
// All Rights Reserved.
#include
#include
// Basic application configuration space:
#pragma num_domain_entries
2
#pragma num_alias_table_entries 0
#pragma receive_trans_count
3
#pragma disable_snvt_si
#pragma run_unconfigured
// Router buffer configurations: APP
#pragma app_buf_out_size
42
#pragma app_buf_in_size 42
#pragma app_buf_out_count 1
#pragma app_buf_in_count 2
// Router buffer configurations: NET
#pragma net_buf_out_size
255
#pragma net_buf_in_size 255
#pragma net_buf_in_count 7
#pragma net_buf_out_count 7
#pragma app_buf_out_priority_count 1
#pragma net_buf_out_priority_count 2
// This pad covers the router EE data.
const unsigned int code_pad[200] = {0};
// Make some room for router configurations
#pragma num_addr_table_entries 15
// Force explicit addressing on by referencing a dummy
// message address
// This code never actually runs.
// Don't use #pragma micro_interface for routers because
// setting that bit causes SI data issues with installers.
// Place this code AFTER code_pad[].
msg_tag NMtag;
void send_msg_dummy(void) {
msg_out.tag = NMtag;
msg_out.dest_addr.snode.type = SUBNET_NODE;
msg_send();
}
IO_0 parallel slave pios1;
// The Transceiver ID is declared here to allocate
// space for it in the link.
L ON W ORKS Router User’s Guide 83