Echelon LonWorks Router - Manual (Page 42)

Name
Pin
Number Type Description
VDD3V3 42 Power 3.3 V Power
SDA_CS1~ 43 Digital I/O for
Memory
I 2 C: serial data
SPI: slave select 1 (active low)
VDD1V8 44 Power 1.8 V Power Input
(from internal voltage regulator)
SCL 45 Digital I/O for
Memory
I 2 C serial clock
MISO 46 Digital I/O for
Memory
SPI master input, slave output (MISO)
SCK 47 Digital I/O for
Memory
SPI serial clock
MOSI 48 Digital I/O for
Memory
SPI master output, slave input (MOSI)
PAD 49 Ground Pad Ground
Clock Pins (XIN and XOUT)
Both the Router 5000 chip and FT Router 5000 chip require a 10 MHz external
crystal or oscillator to provide its input clock signal. The chip then multiplies the
input frequency by an amount specified in the device’s hardware template
(specified during device development using the NodeBuilder FX Development
Tool; see NodeBuilder Hardware Template) to derive its internal system clock
frequency. For multipliers greater than one, the chip uses a phase-locked loop
(PLL) to drive and manage the internal on-chip system clock frequency.
A Series 5000 router chip requires a 10.0 MHz external clock signal for operation.
An example part that meets the requirements for a Series 5000 router chip is the
Abracon Corporation ABMM2-100000MHz-D1 Ceramic Surface Mount Low
Profile Quartz Crystal.
The crystal must have a load capacitance rating of 18 pF. The internal
capacitance for the XIN and XOUT pins is approximately 4.5 pF. To maintain
the crystal’s load capacitance, add a pair of 33 pF external capacitors, as shown
in Figure 13. Note that Figure 13 applies to a single Series 5000 half-router.
Also, you must consider trace capacitance when calculating the values of the
external capacitors. In the figure, the values for R1 (feedback resistor) and R2
(damping resistor) apply to any crystal used.
32 LONWORKS Router Electrical Interfaces