D-20, Shift register instructions – Rockwell Automation 1785-Lxxx Enhanced and Ethernet PLC-5 Programmable Controllers User Manual
Page 320

Publication 1785-UM012D-EN-P - July 2005
D-20 Instruction Set Quick Reference
Shift Register Instructions
Instruction
Description
Bit Shift Left
BSL
Status Bits:
EN - Enable
DN - Done Bit
ER - Error Bit
UL - Unload Bit
If the input conditions go from false-to-true, the BSL instruction
shifts the number of bits specified by Length (5) in File (B3),
starting at bit 16 (B3:1/0 = B3/16), to the left by one bit position.
The source bit (I:022/12) shifts into the first bit position, B3:1/0
(B3/16). The fifth bit, B3:1/4 (B3/20), is shifted into the UL bit of
the control structure (R6:53).
Bit Shift Right
BSR
Status Bits:
EN - Enable
DN - Done Bit
ER - Error Bit
UL - Unload Bit
If the input conditions go from false-to-true, the BSR instruction
shifts the number of bits specified by Length (3) in File (B3),
starting with B3:2/0 (=B3/32), to the right by one bit position.
The source bit (I:023/06) shifts into the third bit position B3/34.
The first bit (B3/32) is shifted into the UL bit of the control
element (R6:54).
FIFO Load
FFL
Status Bits:
EN - Enable Load
DN - Done Bit
EM - Empty Bit
When the input conditions go from false-to-true, the controller
loads N60:1 into the next available element in the FIFO file,
#N60:3, as pointed to by R6:51. Each time the rung goes from
false-to-true, the controller loads another element. When the
FIFO file (stack) is full, (64 words loaded), the DN bit is set.
See page F-8 for a description of prescan activities for
this instruction.
FIFO Unload
FFU
Status Bits:
EU - Enable Unload
DN - Done Bit
EM - Empty Bit
When the input conditions go from false-to-true, the controller
unloads an element from #N60:3 into N60:2. Each time the rung
goes from false-to-true, the controller unloads another value.
All the data in file #N60:3 is shifted one position toward N60:3.
When the file is empty, the EM bit is set.
See page F-8 for a description of prescan activities for this
instruction.
BSL
BIT SHIFT LEFT
File
Bit Address
#B3:1
I:022/12
R6:53
5
Control
Length
BSR
BIT SHIFT RIGHT
File
Bit Address
#B3:2
I:023/06
R6:54
3
Control
Length
FFL
FIFO LOAD
Source
FIFO
N60:1
#N60:3
R6:51
Control
Position
Length
0
64
FFU
FIFO UNLOAD
FIFO
Dest
#N60:3
N60:2
R6:51
Control
Position
Length
0
64