7 gpt toggle-on-overflow register (gpttov), 8 gpt control register 1 (gptctl1) – Freescale Semiconductor ColdFire MCF52210 User Manual
Page 347

General Purpose Timer Module (GPT)
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
21-9
Figure 21-8. Fast Clear Flag Logic
21.6.7
GPT Toggle-On-Overflow Register (GPTTOV)
21.6.8
GPT Control Register 1 (GPTCTL1)
IPSBAR
Offset: 0x1A_0008 (GPTTOV)
Access: Supervisor read/write
7
6
5
4
3
2
1
0
R
0
0
0
0
TOV
W
Reset:
0
0
0
0
0
0
0
0
Figure 21-9. GPT Toggle-On-Overflow Register (GPTTOV)
Table 21-10. GPTTOV Field Description
Field
Description
7–4
Reserved, should be cleared.
3–0
TOV
Toggles the output compare pin on overflow for each channel. This feature only takes effect when in output compare
mode. When set, it takes precedence over forced output compare but not channel 3 override events. These bits are
read anytime, write anytime.
1 Toggle output compare pin on overflow feature enabled
0 Toggle output compare pin on overflow feature disabled
IPSBAR
Offset: 0x1A_0009 (GPTCTL1)
Access: Supervisor read/write
7
6
5
4
3
2
1
0
R
OM3
OL3
OM2
OL2
OM1
OL1
OM0
OL0
W
Reset:
0
0
0
0
0
0
0
0
Figure 21-10. GPT Control Register 1 (GPTCTL1)
Clear
Write GPTCn Registers
Read GPTCn Registers
TFFCA
Data Bit n
Write GPTFLG1 Register
CnF
CnF Flag