Freescale Semiconductor ColdFire MCF52210 - Manual (Page 274)

Edge Port Module (EPORT)
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
16-6 Freescale Semiconductor
16.4.6 Edge Port Flag Register (EPFR)
The EPORT flag register (EPFR) individually latches EPORT edge events.
IPSBAR
Offset:
0x13_0006 (EPFR) Access: User read/write
7 6 5 4 3 2 1 0
R
EPF7 EPF6 EPF5 EPF4 EPF3 EPF2 EPF1
0
W
Reset: 0 0 0 0 0 0 0 0
Figure 16-7. EPORT Port Flag Register (EPFR)
Table 16-8. EPFR Field Descriptions
Field Description
7–1
EPFn
Edge port flag bits. When an EPORT pin is configured for edge triggering, its corresponding read/write bit in EPFR
indicates that the selected edge has been detected. Reset clears EPF7–EPF1.
Bits in this register are set when the selected edge is detected on the corresponding pin. A bit remains set until
cleared by writing a 1 to it. Writing 0 has no effect. If a pin is configured as level-sensitive (EPPARn equals 00), pin
transitions do not affect this register.
0 Selected edge for IRQn pin has not been detected.
1 Selected edge for IRQn pin has been detected.
0 Reserved, must be cleared.