Comtech EF Data SDM-2020 - Manual (Page 18)

SDM-2020 Satellite Demodulator Revision 4
Preface MN/SDM2020D.IOM
viii
GLOSSARY ................................................................................................................ g–1
INDEX .......................................................................................................................... i–1
Figures
Figure 1-1. SDM-2020 Satellite Demodulator..........................................................................................................1–1
Figure 1-2. Demodulator Block Diagram .................................................................................................................1–2
Figure 1-3. 204 Byte Parallel Format .......................................................................................................................1–6
Figure 1-4. 204 Byte Serial Format ..........................................................................................................................1–6
Figure 2-1. Installation of the Optional Mounting bracket, KT/6228-1....................................................................2–3
Figure 2-2. Typical Data Interface Module ..............................................................................................................2–4
Figure 3-1. Rear Panel, Single RF Input, 70/140 MHz, and Earlier L-Band Units ..................................................3–2
Figure 3-2. Rear Panel, Four-RF Inputs, and L-Band Units .....................................................................................3–2
Figure 5-1. 8-PSK TCM Only without Reed-Solomon (Reference Only)................................................................5–7
Figure 5-2. 8-PSK (2/3, 5/6, 8/9) TCM with Reed-Solomon....................................................................................5–8
Figure 5-3. 16-QAM (3/4, 7/8) TCM Only without Reed-Solomon Decoder (Reference Only)..............................5–9
Figure 5-4. 16-QAM (3/4, 7/8) TCM with Reed-Solomon Decoder ......................................................................5–10
Figure 5-5. SDM-2020 Demodulator Envelope......................................................................................................5–15
Figure 6-1. Front Panel.............................................................................................................................................6–2
Figure 6-2. Keypad ...................................................................................................................................................6–4
Figure 6-3. Menu Tree..............................................................................................................................................6–6
Figure 7-1. RS-422 Interface Module PCB ..............................................................................................................7–4
Figure 8-1. LVDS Interface Module PCB ................................................................................................................8–4
Figure 9-1. ASI/RS-422 Interface Block Diagram ...................................................................................................9–2
Figure 9-2. ASI Module Assembly...........................................................................................................................9–3
Figure 10-1. 187 Byte (No Framing) Serial Format ...............................................................................................10–5
Figure 10-2. 188 Byte Serial Format ......................................................................................................................10–5
Figure 10-3. 204 Byte Serial Format ......................................................................................................................10–5
Figure 10-4. 204 Byte DBS Serial Format .............................................................................................................10–6
Figure 10-5. ECL/HSSI Connector, Pin Location ..................................................................................................10–8
Figure 10-6. HSSI Signal Flow ..............................................................................................................................10–8
Figure 10-7. Nominal Interface Timing................................................................................................................10–10
Figure 10-8. Interface Timing...............................................................................................................................10–11
Figure 11-1. G.703 Block Diagram ........................................................................................................................11–3
Figure 11-2. G.703 Interface Assembly..................................................................................................................11–3
Figure 11-3. Co-Located Modulator and Demodulator ........................................................................................11–12
Figure 12-1. SMPTE-310M Interface Block Diagram ...........................................................................................12–2
Figure 12-2. Module Assembly, Part No. AS/6175-2.............................................................................................12–3
Figure 13-1. ASI and LVDS Interface Block Diagram ..........................................................................................13–2
Figure 13-2. ASI/LVDS Jumper Selection .............................................................................................................13–5