Debug and test, Loopback modes – Achronix Speedster22i SerDes User Manual
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Debug and Test
The SerDes comes integrated with a wide range of debug and test features for excellent
coverage. The following features are provided:
•
Seven different loopback modes
•
Pseudo-Random Binary Sequence (PRBS) pattern generators and checkers on PMA
and PCS.
•
User-defined pattern generator and checker in PMA and PCS.
Loopback Modes
The SerDes supports up to seven different loopback modes. The loopback modes can be
divided as PMA loopback and PCS loopback. Each of the PMA and PCS loopbacks has Near
end and Far-end loopback. Near End loopback loops back the data from transmit side to the
receive side while Far end loopback, loops back data from receive side to the transmit side.
1. PMA loopback mode
A.
Near End
(i)
TX to RX PMA Serial internal loopback – This loopback is serial transmit
to receive buffered loopback. Loops back the TX serializer output into the CDR
bypassing the IO drivers.
B.
Far End
(ii)
RX to TX PMA serial loopback - Transmits the untimed, partial equalized
RX serial data on the transmit IO pins.
(iii)
RX to TX PMA parallel loopback – Loops back 20 bit receive data port to
20 bit transmit data port. This uses synthesized bit clock for transmit.
(iv)
RX to TX PMA parallel loopback using recovered clock (Loop timing
mode) - Loops back 20 bit receive data port to 20 bit transmit data port. This uses
recovered clock (CDR) for transmit.
2. PCS loopback mode
A.
Near End
(i)
TX to RX PCS parallel loopback – Transmit data is looped back on the
receive path at the PMA interface.
B.
Far End
(ii)
RX to TX PCS parallel loopback – Receive data is looped back on the
transmit side at the fabric interface. This uses synthesized bit clock for transmit.
(iii)
RX to TX PCS parallel loopback using recovered clock - Receive data is
looped back on the transmit side at the fabric interface. This uses recovered clock
(CDR) for transmit.
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UG028, July 1, 2014