Symbol slip mode, Standards supported by deskew module, Elastic fifo (elastic buffer) – Achronix Speedster22i SerDes User Manual
Page 27: Table 2: symbol slip paramaters

Symbol slip mode:
The deskew module does not actively remove skew across lanes. Each lane is controlled by
the fabric. Fabric continuously monitors incoming data and employ a mechanism to find out
the skew across lanes. Based on the calculation, it instructs each lane to adjust the read
pointer of FIFO. The read pointer can be incremented once by 0, 1 or 2 based on the
combination of rising edges on symbol_slip_up and symbol_slip_dn. Based on the skew
computed, the fabric may need to provide multiple transitions on symbol_slip_up and
symbol_slip_dn to get the required number of pointer adjustments.
Table 2: Symbol Slip Paramaters
symbol_slip_up
symbol_slip_dn
Comments
0
0
Increment read pointer by 1
0
1
No increment
1
0
Increment read pointer by 2
1
1
Increment read pointer by 1
Standards Supported by Deskew Module
The deskew module in Achronix SerDes has explicit support for XAUI and Infiniband. For
XAUI, align(||A||) characters are sent periodically as per section 48 in IEEE 802.3. For
Infiniband, training sequences (TS1/TS2) are used as deskew characters. Though each of
TS1/TS2 is 16 code words long, the de-skew module forms de-skew ordered set with COM
and four data symbols (D10.2). The distance (gap) between COM and data symbols should be
programmed to ‘d1 for Infiniband. In case of 10-bit data path, the max skew handled is 6-
bytes and for 20-bit max skew handled 2-bytes. For training in Infiniband, initially data valid
will be asserted to pass TS1/TS2/TS3 to fabric. Subsequently, data valid is removed when link
training is completed and the fabric decides to de-skew lanes bonded. Once the de-skew
operation is completed, data valid is asserted again.
Besides these two protocols, the user can use this module for deskew functions of any
protocols provided that the minimum spacing between de-skew characters are maintained.
Elastic FIFO (Elastic Buffer)
An elastic FIFO is used to synchronize the received data from the PMA recovered clock to a
system clock, typically the transmit clock. The Elastic FIFO also compensates for any
frequency offset between the recovered clock and the system clock. It compensates for the
frequency offset by adding or deleting pre-configured skip (or pad) characters from the
received data stream. The elastic FIFO in Achronix SerDes provides an indication that skip
(or pad) characters were added or deleted to the downstream logic. For PCIe, the elastic FIFO
also includes the appropriate status encoding to indicate add/delete operation.
The elastic FIFO can also be configured to be used as a simple phase compensation FIFO for
synchronizing data. When used as a phase compensation FIFO, it is left to the user to
guarantee that there is no frequency offset (jitter) between the read and write clocks.
UG028, July 1, 2014
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