Cirrus Logic AN269 - Manual (Page 51)

AN269
AN269REV1 51
8. RASTER MEMORY BUS BANDWIDTH CALCULATION
Since the raster engine uses the main memory of the EP93xx, the total memory bandwidth should be considered
when choosing a display size and bit depth for the frame buffer. Many other blocks also use the memory bus for
transfers, including the USB Host port, the IDE controller, graphics accelerator, and various peripherals via the DMA
engine. Note that the priorities each device is given determine the overall memory bandwidth priorities.
If, for example, a large display is used with a large number of bits per pixel and a high refresh rate, the memory
bandwidth to raster engine may prohibit other devices from functioning properly. In another extreme, if a device re-
quires high bandwidth and is combined with a large display at high refresh and high bit depth, “tearing” of the video
may occur. The best solution to this is to use a display with a smaller resolution or less bit depth in the frame buffer
if other devices are using a large portion of the memory bandwidth.
The formula for calculating the memory bandwidth usage of the raster engine is as follows:
[(Horizontal Resolution) * (Vertical Resolution)] * (Bits per pixel) * 1/8 byte/bit * 1/4 words/byte * (Refresh Rate in
Hertz) = Raster Bandwidth in 32-bit Words/second
Here is an example of a 320x240 LCD, running at 75 Hz with a color depth of 4 bits per pixel:
[(320 Pixels) * (240 Pixels)] * (4 bits per pixel) * 1/8 byte/bit * 1/4 words/byte * (75 Hz) = 720000 32-bit words/second