An269 – Cirrus Logic AN269 User Manual
Page 21
AN269
AN269REV1
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The next two values of interest for a horizontal line are the times at which active data should be clocked
out. These values determine when valid data is presented to the display. As can be seen from the dia-
gram, those times are identical to the locations at which the active data/blank signal are changing (the
active region or tACTIVE). The formulas below calculate HActiveStart as the start of active data and HAc-
tiveStop as the end of active data. The offset of minus one comes from
.
HActiveStart = HClkTotal - tHSYNC - tHBACKPORCH - 1
HActiveStop = tHFRONTPORCH - 1
If clock gating is not required, the HClkStart may be set to HCLKSTOTAL and HClkStop can be set to
HClkTotal + 1 . The counter and HCLKSTOP values are never equal so the clock never stops.
HClkStart = HClkTotal
HClkStop = HClkTotal + 1
When clock gating is required, the SPCLK signal is seen at the output when the horizontal pixel counter
is in the active range HClkStart > horizontal pixel counter > HClkStop. The appropriate values should be
identical to the HBlankStart, and HBlankStop values with the offset of minus six.
HClkStart = HClkTotal - tHSYNC - tHBACKPORCH - 6
HClkStop = tHFRONTPORCH - 6
The above values must then be shifted properly and assigned to the HClkTotal, HSyncStrtStop, HActiveS-
trtStop, HBlankStrtStop, and HClkStrtStop registers.
“Example HSYNC/VSYNC-Style LCD Display - LB/Philips LB064V02-B1” on page 52
for an example
calculation for this type of display