Cirrus Logic AN269 - Manual (Page 11)

AN269
AN269REV1 11
The output mode “Single 16-bit 555 Pixel Per Clock” is shown in Figure 4 . In this mode, each SPCLK will clock out
a single pixel, with 5 bits representing the Blue component on P[5:1], Green component on P[11:7], and Red com-
ponent of the pixel on P[17:13].
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
0
0
0
1
1
1
Pixel Data Bus
Pins P[17:0]
Pixel 0 (First SPCLK)
Pixel 1 (Second SPCLK)
Pixel Data Most
Significant Bits
(fr
o
m LUT and Bl
in
k Logi
c)
Figure 4. Single 16-bit 555 Pixel Per Clock Output