Cirrus Logic AN269 - Manual (Page 10)

10 AN269REV1
AN269
The output mode “Single 16-bit 565 Pixel Per Clock” is shown in Figure 3 . In this mode, each SPCLK will clock out
a single pixel, with 5 bits representing the Blue component on P[5:1], the Red component on P[17:13], and 6 bits
representing the Green component on P[11:6].
0
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
0
0
0
1
1
1
P i x e l D a t a B u s
P i n s P [ 1 7 : 0 ]
P i x e l 0 ( F i r s t S P C L K )
P i x e l 1 ( S e c o n d S P C L K ) Pixel Data Most Significan
t Bits
(from LUT and Blink Logic)
Figure 3. Single 16-bit 565 Pixel Per Clock Output