Cirrus Logic AN269 - Manual

Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
http://www.cirrus.com
Using the EP93xx's Raster Engine
1. INTRODUCTION AND SCOPE
The purpose of this document is to help a user understand how to connect an LCD module to the EP93xx series of
embedded processors from Cirrus Logic. A wide variety of timings and output settings are available, which allows
connection to many color and black-and-white LCD displays. Some timing modes will also allow connection to an
external video DAC, which can be used to drive any type of display.
This application note is focused on the typical usage of certain example LCD screens. As such, the examples were
designed and tested at typical values to show how the LCD controller can be used. If planning to use the LCD con-
troller outside these typical cases, the user should test and verify the application in the target environment. In ad-
dition, this document is not a replacement for the information in the EP93xx User's Guide and the EP93xx Data
Sheet. It should be used in conjunction with these documents. It is highly recommended that the user read the
EP93xx User Guide chapter titled "Raster Engine With Analog/LCD Integrated Timing and Interface" before using
this Application Note.
Throughout this document, signals will be identified in diagrams and equations by their corresponding EP93xx signal
names, unless otherwise specified.
2. HOW TO DETERMINE IF AN LCD IS COMPATIBLE WITH THE EP93XX
The EP93xx raster engine is very versatile, and will work with a variety of LCD display types. In order to determine
if a display is compatible, follow these steps:
1. Check the appendices at the back of this manual to see if the display is listed as an example. If so, use the
specified register settings for that display. Otherwise, proceed to step 2.
2. Examine the waveforms in Figures 9 , 14 , and 20 . If the desired display timings match any of these diagrams
(or vary only in signal polarity), Section 6 , 6.2 , or 6.3 will describe how to set up the EP93xx raster timing
registers. If the display does not match any of these, refer to “Other Types of Framed Data Displays” on
page 41 for more information. Note that the signals AC, XECL, and YSCL are not discussed in these dia-
grams, but are described in the “Video Timing” section of the Raster Engine chapter of the EP93xx User’s
Guide.
3. After determining that the synchronization signals can be generated by the EP93xx, the appropriate pixel
output mode should be chosen.
“General Description of Pixel Output Modes” on page 9 describes this pro-
cess.
If the timing requirements or the pixel input format of the display are not supported, than the display may still be
supported using GPIO pins to generate the appropriate timings. However, this will consume much more processor
time, but may be a viable option for slower/smaller displays.
The versatility of the EP93xx raster engine attempts to cover the most common types of displays. Even though care
has been taken in the design of this block, please keep in mind that not all LCD panels can be supported.
AUG '05
AN269REV1
AN269