Cirrus Logic AN269 - Manual (Page 40)

40 AN269REV1
AN269
6.3.3 Vertical Alignment Signals
The vertical timing alignment signals are easily determined by looking at Figure 21 .
The total number of lines is equal to the vertical resolution (notice there are no “blank” lines):
VLinesTotal = (vertical resolution) - 1
The VCSYNC signal becomes active when the vertical line counter is VLinesTotal - 1 and becomes inac-
tive when it is VLinesTotal - 2. Therefore:
VSyncStart = VLinesTotal - 1
VSyncStop = VLinesTotal - 2
Another result of having no “blank” lines is that the active region covers all of the horizontal lines, so the
active region is the entire vertical width:
VActiveStart = VLinesTotal
VActiveStop = VLinesTotal + 1
t
VCSYNC
VCSYNC
HSYNC
Single Video Frame
SPCLK
First Line
Vertical Line
Counter Value
Count = VLinesTotal
Count = VLinesTotal - 1
Count = VLinesTotal - 2
Count =0
Count = VLinesTotal
Count = VLinesTotal - 1
Figure 21. Frame Type 2 Display Vertical Timing