Cirrus Logic AN269 - Manual (Page 13)

AN269
AN269REV1 13
In the second SPCLK for 2-2/3 mode, pixel 2’s Red component will be clocked out of P[0]. All of the Red, Green,
and Blue components of pixel 3 are clocked out of P[3:1]. Pixel 4’s Red, Green, and Blue components are clocked
out of P[6:4]. Note that ONLY the Blue component of Pixel 5 is clocked out of P[7]. The Green and Red components
of pixel 5 will be clocked out during the third SPCLK.
0
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
2
3
3
3
4
4
4
5
Pixel Data Bus
Pins P[17:0]
Pixels 2, 3, 4 and 5 (Second SPCLK)
Pi
xel D
a
ta Mo
st Si
g
n
if
icant Bi
ts
(fr
om LUT and Blink Logic)
Figure 6. 3-Bit Per Pixel Formatted as 2 2/3 Bits, Second SPCLK