Cirrus Logic AN269 - Manual (Page 38)

38 AN269REV1
AN269
that the timing is met by making the quantity larger than it needs to be. The time from the last SPCLK until
the VCSYNC signal becomes inactive (on the second line) is CPLoadVidClks.
.
HSYNC
SPCLK
t
HSYNCH
Single Horizontal Line
DATA
One SPCLK per Horizontal Pixel
VCSYNC
(Horizontal
Line 2 ONLY)
t
HSYNCSPCLK
t
SPCLKHSYNC
t
VCHHSYNC
t
VCLHSYNC
Count = HClkTotal
Count = 0
Horizontal Line
Counter Value
HSyncStart HActiveStart
HActiveStop
Count = HClkTotal - 1
Count = HClkTotal
Count = 0 HSyncStop
L
oadHi
ghVi
dCl
k
s
Fr
ameHol
dVi
dCl
k
s
Lo
adCPVi
dCl
k
s
Ac
ti
v
e
VidCl
k
s
C
P
L
oadVi
d
Cl
k
s
Figure 20. Frame Type 2 Display with Colored Regions