Ds1876 sfp controller with dual ldd interface – Rainbow Electronics DS1876 User Manual
Page 58

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DS1876
SFP Controller with Dual LDD Interface
Table 02h, Register C0h: PW_ENA
FACTORY DEFAULT
10h
READ ACCESS
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
WRITE ACCESS
PW2 or (PW1 and RWTBL2)
A2h AND B2h MEMORY
Common A2h and B2h memory location
MEMORY TYPE
Nonvolatile (SEE)
C0h
RESERVED
RWTBL1C
RWTBL2
RWTBL1A
RWTBL1B
WLOWER
WAUXA
WAUXB
BIT 7
BIT 0
BIT 7
RESERVED
BIT 6
RWTBL1C: Table 01h or 05h bytes F8–FFh. Table address is dependent on MASK bit (Table 02h,
Register 88h).
0 = (default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 5
RWTBL2: Table 02h. Writing a nonvolatile value to this bit requires PW2 access.
0 = (default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 4
RWTBL1A: Table 01h, Registers 80h–BFh.
0 = Read and write access for PW2 only.
1 = (default) Read and write access for both PW1 and PW2.
BIT 3
RWTBL1B: Table 01h, Registers C0h–F7h.
0 = (default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 2
WLOWER: Bytes 00h–5Fh in main memory. All users can read this area.
0 = (default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
BIT 1
WAUXA: Auxiliary memory, Registers 00h–7Fh. All users can read this area.
0 = (default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
BIT 0
WAUXB: Auxiliary memory, Registers 80h–FFh. All users can read this area.
0 = (default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.