Ds1876 sfp controller with dual ldd interface – Rainbow Electronics DS1876 User Manual
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DS1876
SFP Controller with Dual LDD Interface
Table 01h, Register F8h: ALARM EN
3
POWER-ON VALUE
00h
READ ACCESS
PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C)
WRITE ACCESS
PW2 or (PW1 and RWTBL1C)
A2h AND B2h MEMORY
Mixture of common memory locations and different memory locations (see the
descriptions below)
MEMORY TYPE
Nonvolatile (SEE)
F8h
TEMP HI
TEMP LO
VCC HI
VCC LO
BMON HI
BMON LO
PMON HI
PMON LO
BIT 7
BIT 0
Layout is identical to ALARM
3
in Lower Memory, Register 70h. Enables alarms to create TXFINT (Lower Memory,
Register 71h) logic. The MASK bit (Table 02h, Register 88h) determines whether this memory exists in Table 01h or 05h.
BIT 7
TEMP HI [A2h or B2h]:
0 = Disables interrupt from TEMP HI alarm.
1 = Enables interrupt from TEMP HI alarm.
BIT 6
TEMP LO [A2h or B2h]:
0 = Disables interrupt from TEMP LO alarm.
1 = Enables interrupt from TEMP LO alarm.
BIT 5
VCC HI [A2h or B2h]:
0 = Disables interrupt from VCC HI alarm.
1 = Enables interrupt from VCC HI alarm.
BIT 4
VCC LO [A2h or B2h]:
0 = Disables interrupt from VCC LO alarm.
1 = Enables interrupt from VCC LO alarm.
BIT 3
BMON1 HI [A2h]:
0 = Disables interrupt from BMON1 HI alarm.
1 = Enables interrupt from BMON1 HI alarm.
BMON2 HI [B2h]:
0 = Disables interrupt from BMON2 HI alarm.
1 = Enables interrupt from BMON2 HI alarm.
BIT 2
BMON1 LO [A2h]:
0 = Disables interrupt from BMON1 LO alarm.
1 = Enables interrupt from BMON1 LO alarm.
BMON2 LO [B2h]:
0 = Disables interrupt from BMON2 LO alarm.
1 = Enables interrupt from BMON2 LO alarm.
BIT 1
PMON1 HI [A2h]:
0 = Disables interrupt from PMON1 HI alarm.
1 = Enables interrupt from PMON1 HI alarm.
PMON2 HI [B2h]:
0 = Disables interrupt from PMON2 HI alarm.
1 = Enables interrupt from PMON2 HI alarm.
BIT 0
PMON1 LO [A2h]:
0 = Disables interrupt from PMON1 LO alarm.
1 = Enables interrupt from PMON1 LO alarm.
PMON2 LO [B2h]:
0 = Disables interrupt from PMON2 LO alarm.
1 = Enables interrupt from PMON2 LO alarm.