National Instruments AT-MIO-16X User Manual
Page 317
Index
AT-MIO-16X User Manual
I-8
© National Instruments Corporation
DAC FIFO
continuous cyclic waveform generation,
3-22 to 3-23
cyclic waveform generation, 5-26 to 5-27
DAC waveform and circuitry timing,
3-19 to 3-22
DMA operations, 5-41
interrupt programming, 5-43
programmed cycle waveform generation,
5-28 to 5-30
programmed cyclic waveform
generation, 3-23
programming analog output
circuitry, 5-25
pulsed waveform generation, 3-23 to 3-24
DAC Update Register, 4-55
DAC waveform circuitry and timing,
3-18 to 3-24. See also waveform generation
programming.
analog output waveform circuitry
(figure), 3-21
DACMB<3..0> bits for selecting
waveform modes, 4-21 to 4-22
FIFO continuous cyclic waveform
generation, 3-22 to 3-23
FIFO programmed cyclic waveform
generation, 3-23
FIFO pulsed waveform generation,
3-23 to 3-24
immediate updating of DACs,
3-18 to 3-19
posted DAC update timing (figure), 3-20
posted update mode, 3-18 to 3-20
waveform circuitry (figure), 3-19
waveform timing circuitry, 3-20 to 3-22
DAC0 Register
description, 4-44
programming analog output
circuitry, 5-25
DAC0DSP bit, 4-21
DAC0OUT signal
analog output connections, 2-29
description (table), 2-17, B-4
programming analog output
circuitry, 5-25
DAC0REQ bit, 4-18 to 4-19
DAC1 Register
description, 4-45
programming analog output
circuitry, 5-25
DAC1DSP bit, 4-21
DAC1OUT signal
analog output connections, 2-29
description (table), 2-17, B-4
programming analog output
circuitry, 5-25
DAC1REQ bit, 4-18
DACCMPLINT bit, 4-14
DACCOMP bit
clearing analog output circuitry, 5-32
description, 4-28
servicing update requests, 5-36
DACFIFOEF* bit
description, 4-28 to 4-29
servicing update requests, 5-36
DACFIFOFF* bit
description, 4-28
programming DMA operations, 5-41
DACFIFOHF* bit
description, 4-28
programming DMA operations, 5-41
DACFIFORT* signal, 3-22
DACGATE bit, 4-22 to 4-23
DACMB<3..0> bits, 4-21 to 4-22
DACs, analog output
circuitry, 3-16 to 3-17
immediate updating, 3-18 to 3-19
output configuration, 3-17
posted updating, 3-19 to 3-20
DAQ Clear Register
clearing analog input circuitry, 5-14