Dmatcb clear register, Dmatcb clear register -60 – National Instruments AT-MIO-16X User Manual

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Chapter 4

AT-MIO-16X User Manual

4-60

DMATCB Clear Register

Accessing the DMATCB Clear Register clears the DMATCB signal in
Status Register 1, and acknowledges the interrupt generated from the
Channel B terminal counter interrupt. When the selected DMA
Channel B terminal count is reached, the DMATCB signal in Status
Register 1 is asserted. If DMATC interrupts are enabled, an interrupt
will also be generated.

Address:

Base address + 09 (hex)

Type:

Read-only

Word Size:

8-bit

Bit Map:

Not applicable, no bits used

Strobe Effect:

Clears the DMATCB signal in Status Register 1, and
acknowledges an interrupt from a DMA Channel B
terminal count