Dmatca clear register, Dmatca clear register -59 – National Instruments AT-MIO-16X User Manual

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Chapter 4

4-59

AT-MIO-16X User Manual

DMATCA Clear Register

Accessing the DMATCA Clear Register will clear the DMATCA signal
in Status Register 1, and it will acknowledge the interrupt generated
from the Channel A terminal counter interrupt. When the selected DMA
Channel A reaches its terminal count, the DMATCA signal in the Status
Register is asserted. If DMATC interrupts are enabled, an interrupt will
also be generated.

Address:

Base address + 19 (hex)

Type:

Write-only

Word Size:

8-bit

Bit Map:

Not applicable, no bits used

Strobe Effect:

Clears the DMATCA signal in Status Register 1, and
acknowledges an interrupt from a DMA Channel A
terminal count