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Programming dma operations, Programming dma operations -41 – National Instruments AT-MIO-16X User Manual

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Chapter 5

Programming

© National Instruments Corporation

5-41

AT-MIO-16X User Manual

To program the RTSI switch, complete these steps:

1.

Calculate the 56-bit pattern based on the desired signal routing.

a.

Clear the OUTEN bit for all input pins and for all unused pins.

b.

Select the signal source pin for all output pins by setting bits
S2 through S0 to the source pin number.

c.

Set the OUTEN bit for all output pins.

2.

For i = 0 to 55, follow these steps:

a.

Copy bit i of the 56-bit pattern to bit 0 of an 8-bit temporary
variable.

b.

Write the temporary variable to the RTSI Switch Shift Register
(8-bit write).

3.

Write 0 to the RTSI Switch Strobe Register (8-bit write). This
operation loads the 56-bit pattern into the RTSI switch. At this
point, the new signal routing goes into effect.

Step 2 can be completed by simply writing the low-order 8 bits of the
56-bit pattern to the RTSI Switch Shift Register, then shifting the 56-bit
pattern right once, and repeating this two-step operation a total of
56 times. Only bit 0 of the word written to the RTSI Switch Shift
Register is used. The higher-order bits are ignored.

Programming DMA Operations

The AT-MIO-16X can be programmed so that the ADCFIFOEF*
generates DMA requests every time one or more A/D conversion values
are stored in the ADC FIFO, when the ADCFIFOHF* is low and the
FIFO is half-full, and when the DACFIFO requires at least one data
value (DACFIFOFF* is set), and when the DACFIFO is less than half
full (DACFIFOHF* is set). There are two DMA modes: single-channel
transfer and dual-channel transfer. Single-channel DMA uses only
channel A DMA signals, while dual-channel DMA uses signals for both
Channel A and Channel B. The DMA channels are selected through
Command Register 2. To program the DMA operation, perform the
following steps after the circuitry on the AT-MIO-16X is set up:

1.

Set the appropriate mode bits in Command Register 3 to enable
DMA request generation.

2.

Access the DMATCA and DMATCB Clear Registers, the
TMRREQ Clear Register, the DAC Clear Register, and the DAQ
Clear Register.