National Instruments AT-MIO-16X User Manual

Page 311

Index

AT-MIO-16X User Manual

I-2

ADCDSP bit, 4-13
ADCFIFOEF* bit

description, 4-26
DMA operations, 5-41
interrupt programming, 5-43
reading single conversion result, 5-7
servicing data acquisition operation, 5-22

ADCFIFOHF* bit

description, 4-26
DMA operations, 5-41
interrupt programming, 5-43
servicing data acquisition operation, 5-22

ADCFIFOREQ bit, 4-23
ADCREQ bit, 4-16 to 4-18
address decoder circuitry, 3-3
address latches, 3-3
address lines, 3-3
address selection. See base I/O address

selection.

ADIO<0..3> signal

description (table), 2-17, B-4
digital I/O circuitry, 3-24 to 3-25
digital I/O connections, 2-31 to 2-32

ADIO<3..0> bits

Digital Input Register, 4-69
Digital Output Register, 4-70
programming digital I/O circuitry, 5-36

AIGND signal

description (table), 2-17, B-4
differential connections for floating signal

sources, 2-24 to 2-25

AISENSE signal (table), 2-17, B-4
Am9513A Counter/Timer Register Group,

4-64 to 4-67

Am9513A Command Register, 4-66
Am9513A Data Register, 4-65
Am9513A Status Register, 4-67
programming

general considerations, 5-37

resource allocation considerations,

5-1 to 5-2

sample counters, 5-17 to 5-20
sample-interval counter, 5-16 to 5-17
scan interval counter, 5-20 to 5-21
update-interval counter, 5-32 to 5-33
waveform cycle counter, 5-34
waveform cycle interval counter,

5-34 to 5-36

5-23 to 5-24

Am9513A System Timing Controller

data sheet, C-1 to C-40
initializing, 5-3 to 5-4
programming, 5-37
timing I/O circuitry, 3-25 to 3-29

analog data acquisition rates

multiple-channel scanning rates,

A-5 to A-6

single-channel rates, A-4

analog input

calibration, 6-9 to 6-10
overview, 1-2
signal connections, 2-19 to 2-20

analog input circuitry

A/D converter, 3-6
ADC FIFO buffer, 3-7
block diagram, 3-5
calibration, 3-7 to 3-8
clearing, 5-14
input configuration, 3-6 to 3-7
input multiplexers, 3-6
PGIA, 3-7
programming, 5-5 to 5-6
theory of operation, 3-6 to 3-8

analog input configuration, 2-7 to 2-11

available input modes, 2-7 to 2-10

available configurations (table), 2-8
DIFF input, 2-8